Analysis Result Viewer

• Simulate, measure, and share results independently of PCB design.
• Constrain and plan topologies in the pre-layout phase.
• Plan impedance using the integrated field solver using lossy interconnect models.
• Analyze signals in the time domain.
• Automatic measurement for key distortion and timing parameters (e.g. slew rate) allows fast error detection.

What-If Analysis

Perform what-if analysis to optimize high-speed performance

Electrical Editor

• Extract equivalent electrical topologies based on physical PCB design data (routing and placement).
• Extract coupled/uncoupled transmission line structures with user-defined parameters.
• Detect return path discontinuities by considering true reference plane shapes including routing over cut-outs on reference layers.
• Extract via models (complex vias) and consider back-drilling.
• Consider same-layer reference conductors (Co-planar extraction).
• Perform impedance studies by changing cut-sections in the field solver.

SI Advanced

Signal Integrity Advanced for very high-speed design. Builds on the functionality that the Signal Integrity option delivers and adds even more functionality.

• Derive S-parameters for topologies that you have extracted and edited in Electrical Editor.
• S-Parameters allow modelling passive interconnect behaviour in frequency-domain (derived from measurement or like in eCADSTAR by simulation). S-Parameter export from the Electrical editor handles modelling of passive circuit elements only.
• S-Parameters describe the coupling and transmission behaviour of a system for a wide frequency range. Issues at high frequencies which for example may cause crosstalk can be identified, quickly.
• TDR (Time-Domain-Reflectometry) analysis sends a fast pulse down the PCB trace and displays the returning reflections, which indicate changes in impedance. This allows estimating signal integrity performance without the need to have IBIS buffer models assigned.